This invention relates to a method and an apparatus for securing the programming data of a programmable logic device against copying, and to a programmable logic device so secured.
Programmable logic devices are well known. In one class of known programmable logic devices, each device has a large number of logic gates, and a user programs the device to assume a particular configuration of those logic gates, frequently using a software tool provided by the manufacturer of the device, with the software tool being executed on a computer having an adapter into which the device is inserted. Such devices typically used some form of programmable read only memory ("PROM") technology to store the configuration data produced by the software tool. In early generations of such devices, the software tool caused the computer to "burn" the pattern into the PROM storage by fusing fusible links. In later generations, the PROM technology may have been erasable programmable read-only memory ("EPROM") technology, which was not burned, and could be erased (for reprogramming) by exposure to ultraviolet light. Still later generations may have used electrically erasable programmable read-only memory ("EEPROM" or "E.sup.2 PROM") technology.
All of those technologies were relatively secure. In the case of a user who requires a relatively small volume of a custom integrated circuit, that user might choose to use a programmable logic device rather than incur the effort and expense of a developing a custom chip. If a competitor of that user were to try to reverse engineer the programmed programmable logic device, the competitor would essentially have to slice the device layer by layer to discern its programming. While such an effort might be technically feasible, for the types of users being discussed, who by definition are not chip manufacturers, the likelihood that a competitor could or would undertake the effort is small.
More recently, programmable logic devices that store their configuration data in static random access memory ("SRAM") storage have become available. Such devices have the advantage of being faster than the devices based on EPROM technology, because the SRAM storage operates faster than the EPROM storage.
However, SRAM storage is volatile; it does not retain its contents when power is lost. Therefore, programmable logic devices based on SRAM technology must have nonvolatile storage as well, to retain the configuration programming data during times that the device is switched off or otherwise not provided with power. Such nonvolatile storage may be provided, for example, in the form of EPROM storage, although any form of nonvolatile storage may be used.
Whatever type of nonvolatile storage is used, an SRAM programmable logic device having nonvolatile storage of its configuration data is less secure against reverse engineering by a competitor of its user. That is because a competitor can monitor the data flowing out of the nonvolatile storage on power-up, and thereby determine the programming configuration of the programmable logic device. Indeed, the competitor need not even analyze the data stream, but need only record it and store it in its own devices.
It would be desirable to be able to provide an SRAM-based programmable logic device, with nonvolatile storage, that is nevertheless secure against copying of the programming data.
It would also be desirable to be able to provide such an SRAM-based programmable logic device that relies on multiple levels of security.